CoreConnect

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CoreConnect is IBM’s bus architecture for system-on-a-chip (SoC) designs. It helps connect processors, memory, and peripherals on a single chip and makes it easier to reuse cores in both standard and custom designs. As a design point, CoreConnect serves as a foundation that IBM and non-IBM devices can build on, and it can bridge to other bus standards to reuse existing components.

Key parts of CoreConnect
- Processor Local Bus (PLB)
- General, high-bandwidth bus for fast processor and core connections
- Synchronous, nonmultiplexed with separate Read and Write data paths
- Multimaster with programmable arbitration
- Address width: 32 to 128 bits; data width: 32, 64, 128, up to 256 bits
- Speed: up to 66/133/183 MHz
- Supports pipelining, early split transactions, and overlapped arbitration
- High bandwidth, up to about 2.9 GB/s

- On-chip Peripheral Bus (OPB)
- For slower peripheral devices
- Synchronous, nonmultiplexed and multimaster
- Address up to 64 bits; data width up to 32 bits
- Pipelined transactions and bursts
- Dynamic bus sizing (8-, 16-, 32-bit devices)
- Single-cycle data transfers and bus locking

- Device Control Register (DCR) bus
- Synchronous, single-master, multi-slave
- 10-bit address and 32-bit data
- Two-cycle minimum Read/Write cycles
- Used to move general-purpose register data between the CPU and peripheral logic

- Bridge and interoperability
- CoreConnect can bridge to the AMBA bus family, enabling reuse of existing SoC components and IP from other vendors.

Licensing and usage
- IBM provides CoreConnect as a no-fee, royalty-free architecture to tool vendors, core IP companies, and chip developers.
- It has been licensed to more than 1,500 electronics companies, including Cadence, Ericsson, Lucent, Nokia, Siemens, and Synopsys.
- CoreConnect is a core part of IBM’s embedded offerings and has been widely used in PowerPC-based designs (PowerPC 400 family).
- In the past, Xilinx used CoreConnect as the infrastructure for many of its embedded processor designs.

In short, CoreConnect offers a standardized, flexible way to build high-performance SoCs by providing essential on-chip buses (PLB, OPB, DCR), a bridge to other bus standards, and broad licensing that encourages reuse of components across the industry.