VISC architecture

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VISC, short for Virtual Instruction Set Computing, is a Soft Machines processor design. It uses a Virtual Software Layer to take one thread of instructions and split it into many virtual hardware threadlets, which run on virtual cores. These virtual cores tap into the chip’s physical resources and can share a physical core’s execution units, with several virtual cores feeding into the core’s reorder buffer. Each virtual core tracks its own place in the output. This simultaneous multithreading lets a single thread use more CPU resources, boosting performance. Resource allocation happens quickly (about 1–4 cycles) using scheduling rules when virtual cores compete. Unlike traditional designs that fix work to physical cores, VISC presents resources as virtual cores and virtual hardware threads as needed.