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CompactPCI PlusIO

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CompactPCI PlusIO is an extension to the PICMG 2.0 CompactPCI standard for modular industrial computers. Adopted in November 2009 as PICMG 2.30, it stays fully compatible with CompactPCI while adding a defined, high-speed serial rear I/O path and a migration route toward CompactPCI Serial.

It introduces a new rear I/O approach on the J2 connector, with a fixed interface so cards from different vendors can work together. For 3U single Eurocards, J1 carries the main bus and J2 provides rear I/O; for 6U double Eurocards, J3–J5 handle rear I/O. The J2 connector is an Ultra Hard Metric type with shielding to reduce crosstalk and supports up to 5 Gbit/s, but it does not carry a 64-bit bus anymore. The P2 backplane connector remains the same as in CompactPCI, and J1/J2 keep compatibility with legacy boards, so CompactPCI PlusIO remains 100% compatible with the older 32-bit standard while adding serial, high-speed rear I/O. This creates a bridge to the future CompactPCI Serial and allows hybrid backplanes to support PICMG 2.0, 2.30, and CPCI-S.0.


This page was last edited on 3 February 2026, at 19:48 (CET).