ILLIAC

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ILL IAC stands for Illinois Automatic Computer. It was a family of early supercomputers built mainly at the University of Illinois at Urbana–Champaign (UIUC) and some other places between 1951 and 1974. The first two UIUC machines were influenced by the IAS EDVAC report (the First Draft of a Report on the EDVAC) and figures like John von Neumann, though UIUC completed two IAS-style machines before Princeton finished JOHNNIAC. UIUC also had key involvement from IAS researchers Abraham Taub, Donald Gillies, and Daniel Slotnick.

Order and overview of the machines
- ORDVAC and ILLIAC I: ORDVAC was finished in spring 1951 and checked out by the U.S. Army at Aberdeen Proving Grounds. UIUC then built ILLIAC I based on the same design. ILLIAC I was the first von Neumann–architecture computer owned by an American university and entered service on September 22, 1952. It used about 2,800 vacuum tubes, weighed around five tons, and stored 40-bit words with 1,024 words of fast memory and 12,800 on drum memory. After the launch of Sputnik in 1957, ILLIAC I helped calculate an ephemeris of the satellite’s orbit. ILLIAC I was retired in 1963 when ILLIAC II was completed.
- ILLIAC II: This was UIUC’s first transistorized and pipelined supercomputer. Work began in 1958 and it became operational in 1962, about two years later than hoped. It was about 100 times faster than many contemporary machines. It had 8,192 words of core memory and 65,536 words on magnetic drums, with fast access for short loops. The word size was 52 bits, and floating-point numbers used a 7-bit exponent and 45-bit mantissa. Instructions could be 26 or 13 bits long. ILLIAC II featured a pipelined design with units called advanced control, delayed control, and interplay, and it used Muller speed-independent circuitry in part of its control. In 1963, Donald Gillies used ILLIAC II to help find large prime numbers (three Mersenne primes known at the time). Hideo Aiso contributed to the project’s arithmetic unit.
- ILLIAC III: Built in 1966 as a fine-grained SIMD pattern-recognition computer, it was used for image processing of bubble chamber experiments and later for biological images. It was destroyed by a fire in 1968.
- ILLIAC IV: This was an early attempt at a massively parallel computer, designed to use up to 256 processors arranged in four quadrants. Each quadrant would have a control unit and 64 processing elements. The project faced major cost overruns when the intended large-scale chips (LSI) from Texas Instruments could not be delivered at the promised price, forcing a redesign with smaller chips and a scale-back from four quadrants to one. The machine was very large and complex, and it suffered from power and space challenges. It was built by Burroughs in Great Valley, Pennsylvania, but delays and disputes caused it not to be installed at UIUC. In 1972, the first quadrant was finally delivered and operated at NASA’s Ames Research Center, where it ran much faster than other machines of the time. A Control Unit and some PEs from ILLIAC IV can be seen today at the Computer History Museum.
- CEDAR (sometimes called ILLIAC V): Completed in 1988, CEDAR was a hierarchical shared-memory (symmetric multiprocessing) system led by David Kuck. It advanced interconnection networks, parallel algorithms, and compilers for parallel work.
- ILLIAC 6 and Trusted ILLIAC: Design work began in 2005 at UIUC under Luddy Harrison for ILLIAC 6, planned as a 65,536-node system using commodity DSP cores, aiming for over 1.2 quadrillion multiply-accumulate operations per second and very high bandwidth. The Trusted ILLIAC was completed in 2006 at UIUC’s Coordinated Science Laboratory and Information Trust Institute. It was a 256-node Linux cluster with each node having two processors, onboard FPGAs for smart compilers and trust features, fault management, and online adaptation. Each node had about 8 GB of memory on a fast bus, with high-speed interconnects (PCI-Express to FPGAs and InfiniBand between nodes).

In short, the ILLIAC line started as early, transistorized, and highly experimental UIUC projects that pushed the boundaries of memory, processing speed, and parallelism, influencing many later supercomputers and shaping how researchers thought about computing power for science and engineering.